Thursday, March 30th        SBC Theatre

14:10 - 14:50            Power Amplifier Efficiency Enhancement Techniques Based on Load Modulation

Dr. Taylor Barton, University of Colorado Boulder

This tutorial will discuss efficiency enhancement techniques for RF power amplifiers (PAs), focusing on those using modulation of the load impedance to maintain high efficiency into power back-off. The discussion will begin with an overview of conventional techniques such as direct load modulation, Doherty, and outphasing PAs, and describe PA design techniques when the load impedance is not constant. The tutorial will also highlight recently developed PA architectures for load modulation.

Taylor Barton is an Assistant Professor at the University of Colorado Boulder, with expertise in RF/microwave active circuit design. She received the Sc. B., M.Eng., E.E., and Sc.D degrees from the Massachusetts Institute of Technology, Cambridge, MA. Prior to joining CU Boulder, she was a Postdoctoral Associate in the MIT Microsystems Technology Laboratories and was an Assistant Professor at the University of Texas at Dallas from 2014 to 2016. She is the technical program chair of the Texas Symposium, and a member of MTT Technical Committee 5: Microwave high-power techniques, IEEE Young Professionals, and IEEE Women in Engineering.

14:50 - 15:30            A Digital Approach for Efficiency Enhancement in Transmitters

Dr. Sankalp Modi, Mathworks

Power amplifiers in transmitters, including those employing envelope tracking, are generally designed as reactionary systems; their analog circuitry responds to the input signal originating from the digital baseband processor, which specifies only the instantaneous output signal for that instance. Typically, information about the future signal values is neither provided nor utilized in the transmitter’s analog front end. The approach presented in this tutorial, which is to be implemented primarily in the digital domain, is based on the insertion of a look-ahead window in the signal path, which is realized by simple delay/storage elements that effectively serve to store future samples of the signal to be transmitted. These samples may be exploited in a variety of ways to achieve improvements in the transmitter’s efficiency. This tutorial presents several techniques based on this principle and encourages the audience to rethink some of the existing design assumptions to create better transmitter designs.

Dr. Sankalp Modi received his BSEE from Dharmsinh Desai Institute of Technology, Gujarat, India in 2001, his MSEE from University of Southampton in 2006, and his PhD from the University of Texas at Dallas in 2011. Throughout his doctoral research, he focused on wireless circuits and systems and interned with Samsung Research, where he introduced novel concepts in efficient transmitter design. He is now employed at Mathworks, Massachusetts, in the field of modelling, optimization and design automation. He is author/coauthor on multiple patent applications and conference and journal publications.

Friday, March 31st Classroom 1701

14:10 - 14:50            Meeting the Challenges of RF Design in a CMOS System-on-Chip

Dr. Karan Bhatia, Texas instruments

Advanced System-on-Chips (SoCs) require that analog, RF, and digital subsystems co-exist on the same silicon die. The process technologies used to fabricate these SoCs are tailored to maximize digital circuit performance but are not necessarily best-suited for optimal RF performance. This tutorial presents the RF performance metrics for transistors and passives that are implemented in these advanced CMOS processes, and provides several examples demonstrating common challenges and solutions for integrating these circuits into present-day SoCs.

Dr. Karan Bhatia is a senior IC design engineer at Texas Instruments, with expertise in RF/analog/mixed-signal circuit design, testing and reliability in advanced CMOS processes. He received his B.S.E.E. degree in 2002 from the University of Texas at Austin, his M.S.E.E. degree from the University of Illinois at Urbana-Champaign (UIUC) in 2006, and his Ph.D. degree in electrical engineering at in 2008 from UIUC. He holds 4 US patents and has authored/co-authored 9 publications in IEEE-sponsored conferences and journals. He is a member of the organizing committee for the IEEE International System-on-Chip Conference and served as its technical program chair for the 2016 conference. He is also a member of the technical program committee for the International Symposium on Quality Electronic Design and is a Senior Member of the IEEE.

14:50 - 15:30            Amplifier Design Techniques for Microwave Transmitters and Receivers

Dr. Matt Heins, University of Texas at Dallas

This tutorial will cover several aspects of amplifier design for microwave transmitter and receiver applications. After an introductory discussion of amplifier requirements, linear and non-linear design techniques for low-noise and power amplifiers will be presented. The tutorial will also highlight techniques for verification of stable operation during design and experimental validation, which can occupy a significant part of the total amplifier development time.

Matt Heins has been a Senior Lecturer in the Department of Electrical and Computer Engineering at the University of Texas at Dallas since August 2016. Prior to joining UT Dallas, Matt served in design and design management roles for over 15 years at Qorvo (previously TriQuint Semiconductor). There he designed MMIC LNAs, amplifiers, switches, and VCOs for 77 GHz collision-avoidance radars, amplifiers for CATV networks, and broadband amplifiers for optical transport networks. Matt also led design teams responsible for MMIC and module component development for VSAT radios, wireless backhaul links, and high data-rate optical transport networks, using III-V and SiGe IC technologies. Matt received the Ph.D., M.S., and B.S. degrees in 2000, 1997, and 1995 from the University of Illinois at Urbana-Champaign.